--- abstract: "This paper addresses efficient hardware/software implementation approaches for the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing algorithm for embedded system. Also, with the spread of reconfigurable hardware such as FPGAs (Field Programmable Gate Array) embedded cryptographic hardware became cost-effective. Nevertheless, it is worthy to note that nowadays, even hardwired cryptographic algorithms are not so safe. From another side, the self-reconfiguring platform is reported that enables an FPGA to dynamically reconfigure itself under the control of an embedded microprocessor. Hardware acceleration significantly increases the performance of embedded systems built on programmable logic. Allowing a FPGA-based MicroBlaze processor to self-select the coprocessors uses can help reduce area requirements and increase a system's versatility. The architecture proposed in this paper is an optimal hardware implementation algorithm and takes dynamic partially reconfigurable of FPGA. This implementation is good solution to preserve confidentiality and accessibility to the information in the numeric communication." altloc: - http://ijcsi.org/papers/2-33-40.pdf chapter: ~ commentary: ~ commref: ~ confdates: ~ conference: ~ confloc: ~ contact_email: ~ creators_id: [] creators_name: - family: Alaoui Ismaili given: Zine El Abidine honourific: '' lineage: '' - family: Moussa given: 'Ahmed ' honourific: '' lineage: '' date: 2009-08 date_type: published datestamp: 2009-11-14 11:35:15 department: ~ dir: disk0/00/00/66/94 edit_lock_since: ~ edit_lock_until: ~ edit_lock_user: ~ editors_id: [] editors_name: [] eprint_status: archive eprintid: 6694 fileinfo: /style/images/fileicons/application_pdf.png;/6694/1/2%2D33%2D40.pdf full_text_status: public importid: ~ institution: ~ isbn: ~ ispublished: pub issn: ~ item_issues_comment: [] item_issues_count: 0 item_issues_description: [] item_issues_id: [] item_issues_reported_by: [] item_issues_resolved_by: [] item_issues_status: [] item_issues_timestamp: [] item_issues_type: [] keywords: Cryptography; Embedded systems; Reconfigurable computing; Self-reconfiguration lastmod: 2011-03-11 08:57:31 latitude: ~ longitude: ~ metadata_visibility: show note: ~ number: ~ pagerange: ~ pubdom: TRUE publication: 'Z. E. A. Alaoui Ismaili and A. Moussa, "Self-Partial and Dynamic Reconfiguration Implementation for AES using FPGA", International Journal of Computer Science Issues, IJCSI, Volume 2, pp33-40, August 2009' publisher: 'International Journal of Computer Science Issues, IJCSI' refereed: TRUE referencetext: ~ relation_type: [] relation_uri: [] reportno: ~ rev_number: 21 series: ~ source: ~ status_changed: 2009-11-14 11:35:15 subjects: - comp-sci-mach-learn succeeds: ~ suggestions: ~ sword_depositor: ~ sword_slug: ~ thesistype: ~ title: Self-Partial and Dynamic Reconfiguration Implementation for AES using FPGA type: journalp userid: 9478 volume: 2